Apple M5 silicon could ditch unified memory for split CPU and GPU designs
Rumors suggest Apple's M5 chips may use split CPU/GPU memory, leveraging TSMC's N3P node.

Reports indicate that Apple's next-generation M5 chips may forego their traditional unified memory architecture in favor of separate CPU and GPU memory pools. This potential shift is part of a broader technological update where M5 variants, including the M5, M5 Pro, M5 Max, and M5 Ultra, will utilize TSMC's cutting-edge 3nm N3P process node.
Apple is rumored to be adopting TSMC's 2.5D packaging technology, specifically the System on Integrated Chips-Molding Horizontal (SoIC-mH) method. SoIC-mH, known for ultra-dense connections and superior thermal performance, will help integrate the separate dies horizontally within the same package, potentially enhancing system performance and yield.
Analyst Ming-Chi Kuo predicts the M5 series' production timeline, with the base M5 starting in 2025, followed by Pro/Max variants later that year, and the M5 Ultra in 2026. This move is speculated to support Apple's ambitions in cloud intelligence systems, marking the M5 lineup as Apple's most adaptable silicon innovation yet.